发明名称
摘要 A multicell transistor for use in a circuit has an input ground plane for an input waveguide and an output ground plane for an output waveguide. The multicell transistor includes a gate electrode coupled to the input waveguide, a drain electrode coupled to the output waveguide, and a source electrode coupled to the input ground plane. An output ground strap spaced from the drain electrode couples the output ground plane to the source electrode. A pair of transmission lines are orthogonally connected to and extend from the gate electrode to form a pair of inductors for matching the impedances of the gate electrode and the input waveguide.
申请公布号 JP3115611(B2) 申请公布日期 2000.12.11
申请号 JP19990526707 申请日期 1998.11.03
申请人 发明人
分类号 H01L25/18;H01L23/482;H01L23/66;H01L25/04;(IPC1-7):H01L25/04 主分类号 H01L25/18
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