| 摘要 |
A flash memory. A tunnel oxide layer covers a part of a substrate. The tunnel oxide layer is covered by a floating gate. A first inter-poly dielectric layer is on the floating gate. A controlling gate is on the first inter-poly dielectric layer and extending in a strip shape along a first direction. A second inter-poly dielectric layer covers a first side wall of the floating gate, the first inter-poly dielectric layer, and the controlling gate. A polysilicon spacer is formed covering the second inter-dielectric layer. A drain region is next to a second side wall of the floating gate the first interpoly dielectric layer. and the controlling gate in the substrate. A source region is next to the spacer in the substrate. A select gate covering the controlling gate, the tunnel oxide layer. and the spacer extends along a second direction perpendicular to the first direction.
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