| 摘要 |
PROBLEM TO BE SOLVED: To inhibit replacement of data to which access is frequently made in a cache memory. SOLUTION: A hit mistake counting circuit 300 to hold frequency in which cache hit or cache erroneous hit are continuously generated corresponding to each entry and a writing control circuit 400 to control whether the replacement of entry of the cache memory is inhibited or not are include in the cache memory. Continuous hit frequency as a condition to inhibit the replacement and continuous error frequency as a condition to release inhibition of the replacement are set in the writing control circuit 400 and the replacement is controlled whether it is inhibited or not according to the conditions.
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