发明名称 INTERRUPT PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To directly select an interrupt processing routine according to hardware by unnecessitating any polling processing by software or the rewriting of software. SOLUTION: An interrupt controller INTCTR successively accepts interrupt signals from devices A, B, and C, and outputs an interrupt request signal IRQ and interrupt generating device information INTSEL, and starts the acceptance of the next interrupt by waiting for an acceptance signal IRQACK. A controlling part 1 outputs the origin address of an interrupt processing routine group corresponding to each device, and returns the acceptance signal of the interrupt request signal IRQ to the interrupt controller INTCTR. An interrupt processing routine calling mechanism MAP is provided with a register which registers the offset group of each interrupt processing routine, and the offset of the interrupt processing routine corresponding to the device which generates the interrupt request is searched from the interrupt generating device information INTSEL, and added to the original address.
申请公布号 JP2000339176(A) 申请公布日期 2000.12.08
申请号 JP19990146340 申请日期 1999.05.26
申请人 SEIKO EPSON CORP 发明人 IZUMIDA MASAMICHI;YAMASHITA AYUMI
分类号 G06F9/48;G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/48
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