发明名称 PACKET SWITCH SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To prevent switch efficiency from being deteriorated in the case of extending a switch capacity and to eliminate the need for an additional device for extension. SOLUTION: An input interface section 1-111 has a demultiplexer section 1-411 that demultiplexes an input signal at a speed V into m-sets of signals and an input side selection circuit 1-511 that selects (m-1) sets of signals at a speed V/m from the demultiplexer circuit 1-411 and (m-1) sets of signals at a speed V/m from other packet switch system. Furthermore, an output interface section 1-211 has an output side selection circuit 1-611 that selects (m-1) sets of signals at a speed V/m from a switch module 1-31 and (m-1) sets of signals at a speed V/m from other packet switch system and a multiplexer circuit 1-711 that multiplexes a signal from the switch module 1-31 on the (m-1) sets of signals at a speed V/m from the output side selection circuit 1-611 to convert them into a signal at a sped V. In the case of connecting p-sets of packet switch systems 1-1, m-sets of signals given to the switch module 1-31 are handled by map-sets of signals as one set.</p>
申请公布号 JP2000341281(A) 申请公布日期 2000.12.08
申请号 JP19990145656 申请日期 1999.05.25
申请人 NEC CORP 发明人 YOSHIDA KAORU
分类号 H04Q11/04;H04L12/28;H04L12/931;(IPC1-7):H04L12/28 主分类号 H04Q11/04
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