| 摘要 |
PROBLEM TO BE SOLVED: To provide an integrated circuit capable of testing a first frequency dividing circuit and a second frequency dividing circuit respectively without adding newly a testing terminal. SOLUTION: When a reset terminal 6 is opened to input a clock pulse to a clock input terminal 1, the frequency of the clock pulse is divided by a first frequency dividing circuit 2 to be transmitted to the reset terminal 6 via a signal control circuit 5, and an operation of the first frequency dividing circuit 2 is confirmed by an output of the reset terminal 6. When a second dividing circuit 3 is tested, the clock pulse input to the clock input terminal 1 is stopped after an 'H' signal is supplied once to the reset terminal 6, then an external clock pulse is input thereafter to the reset terminal 6, a selector 9 selects thereby an input signal via the signal control circuit 5, the external clock signal from the reset terminal 6 is input to the second frequency dividing circuit 3, and the second frequency dividing terminal 3 is brought into a frequency dividing operation condition to conduct an output to a dividing output terminal 4. An operation of the second frequency dividing circuit 3 is confirmed by the output.
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