发明名称 SELECT-FREE ACCESS TYPE SEMICONDUCTOR MEMORY COMPRISING BUS SYSTEM ORIENTED IN TWO PLANES
摘要 PROBLEM TO BE SOLVED: To allow a plurality of redundant data lines to be flexibly associated with different groups by allowing a bus line on a first plane to be connected to all of input/output lines and all of data lines and allowing a plurality of independent partial buses on a second plane to be connected to data lines in at least two groups and an input/output line of each one group. SOLUTION: Data lines MDQii, of groups U1 to U8 are respectively connectable to IO lines RWDii of groups IO1 to IO4 via bus systems on two planes. All of bus lines Ai on a first plane A are connectable to all of data lines MDQ11, to MDQ88, redundant lines MDQ1R to MDQ8R, and IO lines RWD11 to RWD48. Bus lines Bi1 to Bi8 on a second plane composed of partial buses B1 to B4 are respectively connectable to two groups of the data lines MDQi1 to MDQi8, the redundant line MDQR, and one group of the IO lines RWDi1 to RWDi8.
申请公布号 JP2000339990(A) 申请公布日期 2000.12.08
申请号 JP20000115370 申请日期 2000.04.17
申请人 INFINEON TECHNOLOGIES AG 发明人 BROX MARTIN;PFEFFERL KARL-PETER
分类号 G06F12/16;G11C11/401;G11C11/409;G11C29/00;G11C29/04;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G11C29/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址