| 摘要 |
PROBLEM TO BE SOLVED: To provide a MOS transistor circuit that is provided with an output circuit that stably operates a load by eliminating unstable state of the output level, when a power supply voltage is low such at rising of the power supply voltage. SOLUTION: In the MOS transistor circuit provided with a logic circuit connected between a high-voltage source VDD and a low-voltage source GND and a CMOS output circuit 14 that is connected between the two voltage sources and receives the output of the logic circuit, the CMOS output circuit 14 employs an enhancement P-channel MOS transistor EPMOS and a depletion N-channel MOS transistor DNMOS. Even when the voltage of the voltage source VDD is lower than the sum of threshold voltages of the EPMOS and the DNMOS, the DNMOS is always in conductive state to fix an output of the output circuit 14 to the voltage of the low voltage source GND. Furthermore, when the voltage of the high voltage source is higher than the voltage above and the output circuit 14 reaches a stably operating state, the EPMOS is conductive and the voltage of the high voltage source is outputted.
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