发明名称 METHOD FOR FORMING METAL INTERCONNECTION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for manufacturing a metal interconnection of a semiconductor device is provided to form a plug without a planarization process, by depositing an anti-seed layer on an interlayer dielectric except the inside of a contact hole or via to selectively form a metal layer. CONSTITUTION: An interlayer dielectric(210) is formed on a semiconductor substrate(200) having a conductive pattern. An anti-seed layer(220) is formed on the interlayer dielectric. A contact hole is formed in a predetermined region of the interlayer dielectric and the anti-seed layer to expose the substrate by a photolithography process. A metal layer is selectively formed only on the interlayer dielectric inside the contact hole to form a planarized plug.
申请公布号 KR100272660(B1) 申请公布日期 2000.12.01
申请号 KR19970030372 申请日期 1997.06.30
申请人 HYUNDAI ELECTRONICS IND. CO., LTD 发明人 PARK, HYUN;KO, CHEOL KI
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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