发明名称 |
ALIGN KEY FOR MANUFACTURING WAFER OF SEMICONDUCTOR |
摘要 |
PURPOSE: A structure of an align key for manufacturing a semiconductor wafer is provided to increase efficiency in using a space, by simultaneously measuring an alignment in X and Y directions by using a pair of verniers. CONSTITUTION: A previous process vernier(100) is widthwise formed on a wafer. A present process vernier(200) is formed on a mask, and has a scale broader than that of the previous process vernier by a predetermined interval so that the present process vernier is located in a position for aligning the present process vernier in the previous process vernier. The interval between the lower scale part of the previous process vernier and the upper scale part of the present process vernier becomes broader gradually as it goes from the center to the right by a predetermined ratio, and becomes overlapped gradually as it goes from the center to the left. An alignment is measured in X and Y directions by using a pair of verniers.
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申请公布号 |
KR100271631(B1) |
申请公布日期 |
2000.12.01 |
申请号 |
KR19970046070 |
申请日期 |
1997.09.06 |
申请人 |
HYUNDAI MICRO ELECTRONICS CO., LTD. |
发明人 |
LEE, DONG KYOU |
分类号 |
H01L21/027;(IPC1-7):H01L21/027 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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地址 |
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