发明名称 A METHOD OF FABRICATING MULTI-INTERCONNECTION LINE
摘要 PURPOSE: A method for manufacturing a multilayered interconnection is provided to prevent a short circuit of an upper interconnection formed on an interlayer dielectric, by improving topography of the interlayer dielectric covering an interconnection pattern and a dummy pattern. CONSTITUTION: A plurality of the first interconnections(27) are formed in a predetermined portion of a substrate(21) while a plurality of the first dummy patterns are formed in a predetermined portion between the first interconnections. The first dummy pattern is so formed that an interval between the first dummy pattern and the first interconnection is 1.5 times as wide as the width of the first interconnection. The first interlayer dielectric is formed to cover the plurality of the first interconnections and the plurality of first dummy patterns. The aforementioned processes are repeated by n-1 times(n is a natural number greater than 1). A plurality of the n-th interconnections are formed on the n-th interlayer dielectric.
申请公布号 KR100269632(B1) 申请公布日期 2000.12.01
申请号 KR19980004979 申请日期 1998.02.18
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 CHOI, MIN SOO
分类号 H01L21/027;H01L21/768;(IPC1-7):H01L21/027 主分类号 H01L21/027
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