摘要 |
PURPOSE: An up/down counter is provided to reduce counting time and use register more effectively by carrying out counting simultaneously in parallel. CONSTITUTION: An 8-bit up counter receives clock signal and source voltage at a clock terminal and a carry-in terminal, respectively. An 8-bit down counter receives a clock signal reversed at the clock terminal. Bit cell signals that enable 8-bit or 16-bit dual mode and carry signal output at the carry-out terminal of the 8-bit up counter are ORed and input to the carry-in terminal of the 8-bit down counter. The 8-bit up counter up-counts 16-bit low order bits, and the 8-bit down counter down-counts 16-bit high order bits. This simultaneous counting reduces time required for counting and number of counting.
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