发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To shorten the time starting from an information writing step until the end of a manufacturing process by writing information to memory cells either through whether or not data lines are connected to memory cells formed on the uppermost one of interconnection layers, or at the final stage prior to the formation of the uppermost interconnection layer. SOLUTION: A plurality of interconnection layers 10 and 13 are formed in a memory cell array a horizontally structured mask ROM. The layers 10 and 13 are located on an upper region, which are higher than the gate electrode 6 of a MISFETQn as a memory cell and which have smaller resistance than the electrode 6. A data line 13 connected to the memory cell is formed on the uppermost layer 13, and information is written by means of the presence of a connection hole 12 between the drain region of the memory cell and the line 13. Since the information can be written at the final stage of a manufacturing process before forming the uppermost interconnection layer, the time required between the information writing step to the manufacturing process of the horizontally structured mask ROM can be reduced.
申请公布号 JP2000332135(A) 申请公布日期 2000.11.30
申请号 JP20000134103 申请日期 2000.05.08
申请人 HITACHI LTD 发明人 SHIBA KAZUYOSHI
分类号 H01L27/10;H01L21/8246;H01L27/112 主分类号 H01L27/10
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