发明名称 METHOD FOR ETCHING GATE ELECTRODE
摘要 PROBLEM TO BE SOLVED: To form an accurate desired gate electrode by suppressing an electron shading damage and reducing positive charging by a polysilicon electrode, in a manufacturing method for semiconductor memory and an etching method for gate electrode using a plasma dry etching method for flash memory or DRAM, etc., having a floating gate. SOLUTION: In a method for etching a gate electrode of a nonvolatile semiconductor memory, a first polysilicon layer on a thin oxidized film on a silicon substrate is etched to a specified thickness in a first etching step, and etching is continued under conditions where the plasma density is 1×1010 cm-3 or lower, the electron temperature is 3 eV or lower, and the selection ratio to oxidized film is 100 or more, in a second etching step until the thin oxidized film appears.
申请公布号 JP2000331990(A) 申请公布日期 2000.11.30
申请号 JP19990145318 申请日期 1999.05.25
申请人 NEC CORP 发明人 YOSHIDA KAZUYOSHI
分类号 H01L21/302;H01L21/3065;(IPC1-7):H01L21/306 主分类号 H01L21/302
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