| 摘要 |
PROBLEM TO BE SOLVED: To use the flat surface of a substrate itself as a conduction layer for eliminating nonuniformity of a conduction layer by forming a semi-insulation layer on a low-resistance substrate, then forming a via hole, and performing electrolytic plating of the low-resistance substrate as the conduction layer and hence embedding metal into the via hole. SOLUTION: A semi-insulation layer 2 is formed on a low-resistance substrate 1, and further epitaxial structure 3 is formed as needed for creating a substrate A. Then, an ohmic contact 4, an interlayer insulation film 5, wiring 6, and an insulation film 7 are formed on the substrate A. Then, a via hole 8 is formed. In this case, the via hole 8 is stopped in the middle of the low-resistance substrate 1. Then, by electrolytic plating with the low-resistance substrate 1 as a conduction layer, embedded metal 13 is formed in the via hole 8, thus making uniform the conduction layer, since the flat surface of the substrate itself is used as the conduction layer without forming the conduction layer on a surface with large recessed and projecting parts which are generated by sputtering or the like as in conventional methods.
|
