发明名称 |
DRIVE RECEPTION SYSTEM OF WIRING PATH |
摘要 |
PROBLEM TO BE SOLVED: To obtain a high speed at the reception end of a line where a signal is delayed as to the drive reception system of the wiring path of a semiconductor integrated circuit. SOLUTION: A drive end side is equipped with a circuit 1 which delays an input signal and outputs an inverted signal and a circuit 2 which drives the drive end with the inverted level of the input signal in response to the level variation of the input signal in a delay period and holds the drive end at high impedance for a specific period from after the lapse of a delay time to the start of a next delay period, and a reception end side is equipped with a circuit 3 which holds a reception end level at a 1st level in a period of high impedance and induces the reception end level variation into the opposite direction according to the level variation at the drive end and a circuit 4 which outputs a 2nd low level between the 1st level and a source voltage according to the level variation at the reception end that the circuit 3 operates and outputs a 3rd high level between the 1st level and the ground potential.
|
申请公布号 |
JP2000332590(A) |
申请公布日期 |
2000.11.30 |
申请号 |
JP19990139547 |
申请日期 |
1999.05.20 |
申请人 |
NEC IC MICROCOMPUT SYST LTD |
发明人 |
KAMATANI MICHITOKU |
分类号 |
H03K19/0175;H04L25/02;(IPC1-7):H03K19/017 |
主分类号 |
H03K19/0175 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|