| 摘要 |
PROBLEM TO BE SOLVED: To reduce resistances of the gate electrode, source, and drain of an MISFET(metal insulator semiconductor field-effect transistor) and, at the same time, to provide a manufacturing process by which various lines of products can be made easily. SOLUTION: Silicide layers 9 are formed on the surfaces of sources and drains (N+-type semiconductor areas 14 and p+-type semiconductor areas 15) while the top faces of gate electrodes 7 are covered with solicon oxide films and, after the silicon oxide films are removed, silicon nitride films 17 and silicon oxide films 18 are successively formed on the gate electrodes 7. Then contact holes 20 and 21 are formed on the sources and drains (n+-type semiconductor areas 14 and p+-type semiconductor areas 15) and, at the same time, contact holes 22 are formed on the gate electrodes 7 by using the self-alignment contact(SAC) technology.
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