发明名称 BAND CONTROLLER
摘要 <p>PROBLEM TO BE SOLVED: To control a band by deciding an average bit rate even when the number of bits of packets is not constant. SOLUTION: A packet write circuit 11 writes received packet data to a first-in first-out memory FIFO 12. A read control circuit 14 is provided with a timer 16, that counts the time from start of operation and with a counter 15 that counts the number of already transmitted bits, so as to obtain an average bit rate from these values up to that time. This read control circuit 14 outputs an EN signal to the packet read circuit 11, when the average bit rate is lower than a reference bit rate BR 1 and generates a read signal of the FIFO 12.</p>
申请公布号 JP2000332763(A) 申请公布日期 2000.11.30
申请号 JP19990143927 申请日期 1999.05.24
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAGAI TETSUYA;FUJITA SHOICHI;DOGUCHI MAKOTO
分类号 H04L12/801;H04L12/28;H04L12/70;H04L12/807;H04L12/811;H04L12/873;H04L12/911;(IPC1-7):H04L12/28 主分类号 H04L12/801
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