| 摘要 |
PROBLEM TO BE SOLVED: To generate a frequency signal of invariably high purity by previously obtaining whether or not there is a spurious component below the loop filter band frequency of a PLL and varying the frequency of the spurious component so as to evade that. SOLUTION: When an operation coefficient varied and controlled by a setting condition arithmetic part 60 is denoted as (a), a 1st reference frequency signal f1 generated by a DDS 11 is a×fref and a 2nd reference frequency signal generated by a DDS 12 is (2-a)×fref. A frequency component f3 which is the sum of the products of both the outputs by a mixer 14 is 2×fref and has its frequency divided by a 1/2 frequency divider 18 to obtain a reference frequency signal fref to be supplied to a PLL oscillation part 100. The value of the operation coefficient (a) is so varied and controlled that a clock frequency fclk used in the DDSs and a spurious component accompanying the higher harmonic degree (P) of the reference frequency signal fref are not present in a frequency area below the loop filter band frequency (fbw) of the PLL oscillation part 100. |
