发明名称 |
DRAM REFRESH SYNCHRONOUS TYPE MEMORY DOUBLING DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To prevent a refreshing process from becoming out of synchronism even at system switching time by allowing a refresh request generation part of an in-operation system common memory card to send a refresh synchronizing signal to a refresh request part of a stand-by system common memory card only when the card is initialized. SOLUTION: When an other-system initialization completion signal is received within a prescribed time, clocking is ended, it is judged that this system is an in-operation system and there is the other system (standby system), and a refresh synchronous responding circuit 24 is informed of a refresh generation request and a state 17 and sends an external refresh synchronizing signal 15-o to the other system. The refresh synchronous responding circuit 24 which is informed of the request sends of a refresh counter clear request signal 26 to a refresh counter control circuit 23. A refresh counter 25 counts thereafter in synchronism with a bus clock and sends a refresh request signal 18 out to a memory access arbitrating circuit in fixed cycles.
|
申请公布号 |
JP2000330812(A) |
申请公布日期 |
2000.11.30 |
申请号 |
JP19990141329 |
申请日期 |
1999.05.21 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD;FUJITSU LTD;PFU LTD |
发明人 |
YAMAGUCHI MASAFUMI;YAMADA TAKAHIRO;KUMAGAI TOMONORI;YAMAZAKI SEIYA;YONEKURA TAKESHI;SHIMIZU YOSHIHIKO |
分类号 |
G06F12/16;G06F11/20;G06F12/00;(IPC1-7):G06F11/20 |
主分类号 |
G06F12/16 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|