发明名称 Semiconductor integrated circuits with power reduction mechanism
摘要 This invention is to reduce the power dissipation of a semiconductor integrated circuit chip when it is operated at an operating voltage of 2.5 V or below. To achieve the object, a switching element is provided in each circuit block within the semiconductor integrated circuit chip. The constants of the switching element are set so that the leak current in the switching element of each circuit block in their off-state is smaller than the subthreshold current of the MOS transistors within the corresponding circuit block. The active current is supplied to the active circuit blocks, while the switching elements of the non-active circuit blocks are turned off. Thus, the dissipation currents of the non-active circuit blocks are limited to the leak current value of the corresponding switching elements. As a result, the sum of the dissipation currents of the non-active circuit blocks is made smaller than the active current in the active circuit blocks. Since the dissipation currents of the non-active circuit blocks can be reduced while the active current is caused to flow in the active circuit blocks, the power dissipation in the semiconductor integrated circuit chip can be reduced even in the active state.
申请公布号 US6154062(A) 申请公布日期 2000.11.28
申请号 US19980141563 申请日期 1998.08.28
申请人 HITACHI, LTD. 发明人 SAKATA, TAKESHI;ITOH, KIYOO;HORIGUCHI, MASASHI
分类号 G11C5/14;G11C7/06;G11C8/08;G11C8/12;H03K19/00;H03K19/003;(IPC1-7):H03K19/096;H03K19/094 主分类号 G11C5/14
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