发明名称 |
Image output apparatus and image decoder |
摘要 |
An image output apparatus capable of realizing asynchronous data access by a host controller in response to an image data transfer request from the host controller, by adding a minimum amount of circuitry to the image output apparatus without using an external data buffer. The image output apparatus includes: a storage device for storing image data; a display circuit for sequentially reading the image data from the storage device and converting the image data into image data capable of being displayed; a timing controller for controlling the operation timing of the display circuit; and an output circuit for changing an operation mode of the timing controller in response to a data transfer request from the host controller and allowing the image data corresponding in amount to the data transfer request to be outputted asynchronously.
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申请公布号 |
US6154202(A) |
申请公布日期 |
2000.11.28 |
申请号 |
US19980003466 |
申请日期 |
1998.01.05 |
申请人 |
HITACHI, LTD.;SEGA ENTERPRISES, LTD. |
发明人 |
HARA, HIROTAKA;SAITOH, TADASHI;KIMURA, JUNICHI;OKUNOKI, YUTAKA |
分类号 |
H03M7/00;G06T1/60;G06T9/00;G09G5/18;H03M7/30;(IPC1-7):G09G5/00 |
主分类号 |
H03M7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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