发明名称 |
Method of forming a portion of a memory cell |
摘要 |
The invention may be incorporated into a method for forming a vertically oriented semiconductor device structure, and the semiconductor structure formed thereby, by forming a first transistor over a portion of a substrate wherein the first transistor has a gate electrode and a source and drain regions. First and second interconnect regions are formed over a portion of the gate electrode and a portion of the source and drain regions of the first transistor, respectively. A source and drain region of a second transistor is formed over the second interconnect. A Vcc conductive layer is formed over a portion of the source and drain region of the second transistor which is formed over the second interconnect.
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申请公布号 |
US6153458(A) |
申请公布日期 |
2000.11.28 |
申请号 |
US19950438015 |
申请日期 |
1995.05.08 |
申请人 |
STMICROELECTRONICS, INC. |
发明人 |
ZAMANIAN, MEHDI;WORLEY, JAMES LEON |
分类号 |
H01L21/82;H01L21/8244;H01L27/11;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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