| 摘要 |
A process for forming a modified polysilicon plug structure, used to connect a bit line structure, of a semiconductor memory device, to an underlying source and drain region, of a transfer gate transistor, has been developed. The process features the formation of a dual shaped opening in an insulator layer, comprised of a wide, upper opening, overlying a narrower, lower opening, which exposes the top surface of a source and drain region. Polysilicon deposition and patterning result in the formation of the modified polysilicon plug structure, comprised of a wide polysilicon trench shape, in the upper opening in the insulator layer, and an underlying, narrower polysilicon plug, in the lower opening, in the insulator layer, with the narrow polysilicon plug contacting the underlying source and drain region. An overlying bit line structure is formed, contacting the top surface of the underlying, polysilicon trench shape, exposed in a bit line via hole.
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