发明名称 FULLY LAZY LINKING WITH MODULE-BY-MODULE VERIFICATION
摘要 A method, computer program, signal transmission and apparatus verify instructions in a module of a computer program during linking using pre-verification constraints with fully lazy loading. It is first determined whether a first module which is loaded has passed verification one-module-at-a-time before linking. If the first module has passed verification, a pre-verification constraint on a constrained module is read, if any. It is then determined if the constrained module is loaded, if any pre-verification constraint is read. If the constrained module is not already loaded, the pre-verification constraint is retained as a verification constraint.
申请公布号 CA2309772(A1) 申请公布日期 2000.11.27
申请号 CA20002309772 申请日期 2000.05.26
申请人 SUN MICROSYSTEMS, INC. 发明人 BRACHA, GILAD;LIANG, SHENG;LINDHOLM, TIMOTHY G.
分类号 G06F15/16;G06F9/445;G06F9/54;G06F21/22;(IPC1-7):G06F9/40 主分类号 G06F15/16
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