发明名称 |
TWO TRANSISTOR SINGLE CAPACITOR FERROELECTRIC MEMORY |
摘要 |
PROBLEM TO BE SOLVED: To obtain a back-plane ferroelectric memory apparatus employing a read transistor, a write transistor and a ferroelectric capacitor storage means. SOLUTION: A back plane 26 forms a gate region underneath the read transistor 20 with the potential of the back plane affected by polarization of the ferroelectric capacitor. The write transistor 18 and the read transistor 20 are different, the write transistor 18 may be a vertical structure and the read transistor 20 may be a back plane planer structure. The drain of the write transistor 18 is connected to the back plane of the read transistor 20 and a plate of the ferroelectric capacitor 22. |
申请公布号 |
JP2000323670(A) |
申请公布日期 |
2000.11.24 |
申请号 |
JP20000077995 |
申请日期 |
2000.03.21 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
TIWARI SANDIP |
分类号 |
H01L21/8247;G11C11/22;H01L21/8242;H01L21/8246;H01L27/105;H01L27/108;H01L29/786;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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