| 摘要 |
PROBLEM TO BE SOLVED: To decrease a circuit scale and also shorten a delay time by obtaining the functions of a time-division switch for path setting and an elastic store memory constituting phase adjustment after a pointer process and/or a frame aligner and the function of a data memory. SOLUTION: A WFCTRC (floating counter) 12 is composed of a group of counters operating independently by tributary units. A VC head pulse and staff information from a PTRPC (pointer process part) 11 are inputted to a corresponding WFCTR 12. The WFCTR 12 performs initialization according to the VC head pulse, controls counting operation with the staff information, and multiplexes and outputs main signal write addresses corresponding to destaff processes by tributary units. A DM(data memory) 15 stores main signal data.
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