| 摘要 |
PROBLEM TO BE SOLVED: To reduce the OFF-state current of an FET in a DRAM cell and provide a mathod for manufacturing to keep the leakage of a source and drain joint small. SOLUTION: Boron ions are implanted at a high concentration into a silicon substrate 1 provided with a source area 13 and a drain area 15, so that a boron concentration layer 28 is formed on the surface of the substrate, and an oxide layer 29 is formed on the side of a gate 18 as well as on a source and drain part and a nitride spacer 30 is formed thereon. Then, the source and drain part is etched and a polysilicon layer 36 is accumulated thereon, and an RTO is applied thereto at 1000 deg.C or higher. Thus, a transfer device channel part under the gate 18 is left at a high concentration, and after the boron ions on the source area 13 and drain area 15 are diffused in the polysilicon layer 36, the polysilicon layer 36 is removed. |
