发明名称 SEMICONDUCTOR MEMORY CELL
摘要 PROBLEM TO BE SOLVED: To obtain a semiconductor memory cell, having a high degree of flexibility during designing or manufacturing phases and having two transistors and a junction transistor merged into one. SOLUTION: This semiconductor memory cell comprises a first transistor TR1, a second transistor TR2, a junction transistor JF1, first to fifth regions (SC1 to SC5) and a gate region G. The source/drain regions and channel-forming region CH1 of the transistor TR1 are formed of the second/fourth regions (SC2, SC4) and the surface region of the first region SC1. Furthermore, the source/ drain regions and channel-forming region CH2 of the transistor TR2 are formed of the first/third regions (SC1, SC3) and the second region SC2, and the transistor JF1 is formed of the first, fourth and fifth regions (SC1, SC4, SC5). Still further, when the semiconductor memory cell is cut by a first hypothetical perpendicular plane PL1, the second region SC2 and fourth region SC4 close to the gate region G are symmetrical with respect to a second hypothetical perpendicular plane PL2.
申请公布号 JP2000323588(A) 申请公布日期 2000.11.24
申请号 JP19990131542 申请日期 1999.05.12
申请人 SONY CORP 发明人 MUKAI MIKIO;KOBAYASHI TOSHIO;HAYASHI YUTAKA
分类号 G11C11/401;H01L21/8242;H01L27/108 主分类号 G11C11/401
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