发明名称 DIGITAL DEMODULATOR AND ITS DEMODULATION METHOD
摘要 PROBLEM TO BE SOLVED: To properly correct even a varying phase jitter and to secure stable demodulation for a long period of time by receiving the output of a phase error detection means and controlling the gain of a loop filter by a phase jitter suppression control signal. SOLUTION: A phase error detection circuit 104 detects the position of a symbol on a complex surface from a complex signal containing two input signals 144a and 144b, i.e., the sin and cos components respectively, decides a phase from the angle of the symbol position to compare this phase with an original reference phase and outputs a phase error signal 146 according to the difference between both phases. The signal 146 is inputted to a code decider 111 of a phase jitter suppression circuit 105, a multiplier 123 and two gain control circuits 131 and 132 of a secondary loop filter 106 respectively. The parts 131 and 132 decide the loop gains of the phase locked loops of a demodulator and can control the phase jitter by adaptively controlling those gains via a phase jitter suppression control signal 151.
申请公布号 JP2000324192(A) 申请公布日期 2000.11.24
申请号 JP19990134022 申请日期 1999.05.14
申请人 TOSHIBA CORP 发明人 SUGITA YASUSHI;NISHIKAWA MASAKI
分类号 H04L27/227;H04L7/00;H04L27/22 主分类号 H04L27/227
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