| 摘要 |
A semiconductor integrated circuit device comprising a memory which includes memory cells and circuit blocks, power supply switching means, and a refresh controller and having first and second operating modes, wherein the refresh controller refreshes the memory cells by supplying power to the memory by using the power switching means in the first operating mode, and stops the power supply to at least one circuit block by using the power supply switching means in the second operating mode so as to set up an operating mode in which transition between the first and second modes are repeated plural times. The power needed while such a semiconductor integrated circuit device including a memory element having a long refresh cycle is in a waiting mode is lowered, thereby reducing the overall power of the semiconductor integrated circuit device.
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