发明名称 Low noise, high sampling frequency sample and hold circuit
摘要 <p>The memory device comprises a capacitor (C1) with one terminal connected via an interrupter unit (SW1) controlled by signal (Svref) to the input of signal (Vccd) from a Charge-Coupled Device (CCD), and a voltage-control element or buffer (BF). The interrupter (SW1) comprises two bipolar transistors (T1,T2) with antiparallel flows of main currents, two current sources (I1,I2 controlled by signals (SI1,SI2) for an alternate flow of currents to the basis of transistors, and an inverter (INV) to prevent simultaneous flow of both currents. The bases of transistors are short-circuited. The voltage-control element (BF) connected between the output terminal and the bases of transistors limits the base-emitter voltage amplitude. The transistors (T1,T2) are of npn-type with a ring collector. A device for the generation of video signal fr an input of pseudo-periodic signal (Vccd) from a CCD, comprises two branches each containing one memory device with the referenc and video voltage levels, respectively, and outputs connected to a subtractor forming the difference of two voltage levels. A de for image acquisition, e.g. video camera, comprises a device of type CCD for the detection and conversion of light to an electri pseudo-periodic signal, an input stage as the generation device receiving the electric signal and delivering the video signal, a processor unit comprising preferentially an analog-to-digital converter for utilizing the video signal.</p>
申请公布号 EP1054409(A1) 申请公布日期 2000.11.22
申请号 EP20000201676 申请日期 2000.05.10
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 DARTHENAY, FREDERIC
分类号 G11C27/02;H03K17/66;H04N5/907;(IPC1-7):G11C27/02 主分类号 G11C27/02
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