| 摘要 |
<p>A MOSFET device (100) that exhibits low power loss characteristics by minimizing source-to-drain channel on resistance includes a semiconductor block having at least two surfaces and a drift region (110) disposed within the semiconductor block; the drift region is characterized by a first conduction type and a first predetermined dopant concentration. A body region (104) with a second conduction type is disposed within the semiconductor block between and adjacent to the first surface and the drift region. A source region (142) is disposed within the semiconductor block, and is embedded in the body region so as to be adjacent to the body region and the first surface. The MOSFET device further includes at least one drain region disposed in the semiconductor block between the second surface and the drift region. An opening is formed in the body region, extending from the first surface and into the semiconductor block. The opening has one or more interior walls (106) that are doped with a dopant of the same conduction type as the body region, and at a second predetermined dopant concentration, so as to form a depletable region near the walls. A blocking voltage applied across the MOSFET device depletes charge carriers within the semiconductor block, so as to substantially prevent electrical current from flowing through the MOSFET between the source region and the drain region. The opening, or trench (102), in the device forces the depletion region to spread laterally within the drift region as blocking voltage increases.</p> |
