SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A semiconductor memory device is provided to test a redundancy cell and a normal cell simultaneously by activating a selected redundancy cell block during being operated in a redundancy cell test mode and a normal cell block adjacent to the redundancy cell block, and therefore a bridge between the cells is detected easily. CONSTITUTION: A semiconductor memory device comprises a simultaneous test control part(10) for a redundancy and a normal cell. In order to test the normal cell block and the redundancy cell block simultaneously, the test control part(10) generates an enable signal activating an address signal of a redundancy cell block and a normal cell block adjacent to the redundancy cell block simultaneously, in response to the address signal of the block during the redundancy cell test mode. The test control part(10) includes: a detection part(12) detecting a cell test mode by receiving the block address signal and the redundancy cell test signal; a driving transistor(NMOS1) switched in response to an output signal of the detection part; a number of transistors turned on in response to the address signal; a power supply part(14) applying a power source voltage to the driving transistor(NMOS1); and an output part(16) having a transistor applying the power source voltage to a node to which the power supply part(14) and the driving transistor are connected, by being feedback-connected to an inverter.