FLASH MEMORY DEVICE HAVING DUMMY CELL

摘要

PURPOSE: A flash memory device having a dummy cell is provided to enable the read time similar to a DRAM or a SRAM by removing the bit line precharge time included in a conventional read time. CONSTITUTION: A first and a second memory cell arrays are connected to a bit line such as a plurality of dummy cells and a plurality of normal cells, and are bifurcated. A sense amplifier compares the current output from a cell selected from the first memory cell array and the second memory cell. The word line of the dummy cell is selected from the second memory cell array when a word line of the first memory cell array is selected. The word line of the dummy cell is selected from the first memory cell array when a word line of the second memory cell array is selected.