发明名称 |
A VERTICAL CONNECTOR BASED PACKAGING SOLUTION FOR INTEGRATED CIRCUITS |
摘要 |
<p>An assembly featuring a substrate and a plurality of components. The plurality of components are packaged to be connected in a vertical orientation to the substrate. These components include (i) a vertical chip-scale package (CSP), (ii) an integrated circuit die and (iii) an interconnect. Including a plurality of connection leads, the vertical CSP contains the die which is generally situated along a vertical plane. The interconnect, capable of transferring information between the plurality of connection leads and the integrated circuit die, includes a first segment generally perpendicular to the vertical plane and connected to at least one connection lead. The interconnect further includes a second segment generally in parallel to the vertical plane and connected to the integrated circuit die.</p> |
申请公布号 |
EP1051748(A1) |
申请公布日期 |
2000.11.15 |
申请号 |
EP19980964295 |
申请日期 |
1998.12.21 |
申请人 |
INTEL CORPORATION |
发明人 |
HOLMAN, THOMAS, J.;LEDDIGE, MICHAEL, W. |
分类号 |
H01L25/065;H05K1/18;H05K3/34;H05K7/02;(IPC1-7):H01L23/02;H01L23/057;H01L23/053;H01L23/047;H01L23/043;H01L23/12;H05K1/11;H05K1/14;H05K7/20;H05K7/06 |
主分类号 |
H01L25/065 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|