发明名称 Three input split-adder
摘要 An integrated circuit includes an adder (210) having a first adder circuit (220) for receiving a portion of the operands to be summed, along with corresponding carry-in inputs (250, 252). The first adder circuit provides a sum output (228) and carry-out outputs (254, 256). A second adder circuit (230) receives another portion of the operands to be summed, along with corresponding carry-in inputs (268, 270). Multiplexers (276, 278) between the first and second adder circuits determine whether the carry-in inputs to the second adder circuit are the same the carry-in inputs to the first adder circuit or whether the carry-in inputs to the second adder circuit are independent. <IMAGE>
申请公布号 EP1052568(A1) 申请公布日期 2000.11.15
申请号 EP20000303257 申请日期 2000.04.18
申请人 AGERE SYSTEMS OPTOELECTRONICS GUARDIAN CORPORATION 发明人 MORGAN, EDWARD CLAYTON
分类号 G06F7/50;G06F7/506;G06F7/509 主分类号 G06F7/50
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