发明名称 INTERFACE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an interface circuit that has a small parasitic capacitance to regulate a slew rate, realizes a high-speed operation improves a jitter characteristic and reduces noise. SOLUTION: A collector current of 7th and 6th bipolar transistors(TRs) Q107, Q106 that is a current of a level shift circuit in the interface circuit is made equal to a collector current of a 5th bipolar TR Q105 that is a common emitter current of 3rd and 4th bipolar TRs Q103, Q104 of a 2nd differential circuit 102, a reciprocal of a current gain of a current mirror circuit 103 is introduced as a coefficient, and a resistance of a 5th resistive element R105 is selected to be a value multiplying the coefficient with a sum of a resistance RV2 of a 2nd resistive element R102, a resistance RV4 of a 4th resistive element R104 and a resistance RV7 of a 7th resistive element R107.
申请公布号 JP2000315943(A) 申请公布日期 2000.11.14
申请号 JP19990123814 申请日期 1999.04.30
申请人 SONY CORP 发明人 KATAKURA MASAYUKI
分类号 H03K17/567;H03F3/345;H03K19/0175;H03K19/08;(IPC1-7):H03K19/017 主分类号 H03K17/567
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