发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To efficiently transfer data between a memory and an I/O device with respect to a semiconductor device arranged among a CPU, the memory and the I/O device so as to act as a data transfer bridge. SOLUTION: A CPU interface 11 and I/O interfaces 13 to 15 in a bridge chip 1 are connected to a DRAM interface 12 through an internal bus 10. These I/O interfaces 13 to 15 are respectively provided with read/write buffers 21 to 23 and DMACs 26 to 28. An arbiter 17 determines a bus master to be permitted in accordance with requests of data transfer with a DRAM 3 which are outputted from the CPU interface 11 and respective DMACs 26 to 28. Each of the I/O interfaces 13 to 15 has a function for controlling data transfer with the DRAM 3 so as to transfer data by skipping a part of areas in the DRAM 3.
申请公布号 JP2000315186(A) 申请公布日期 2000.11.14
申请号 JP19990125595 申请日期 1999.05.06
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 AYUKAWA KAZUSHIGE;SATO JUN;MIYAMOTO TAKASHI;OMURA KENICHIRO;HAMAZAKI HIROYUKI;TAKEDA HIROSHI;TAKANO MAKOTO;MOCHIZUKI ISAMU;HOSHI YASUHIKO;HIRAIDE KAZUHIRO;MURASHIMA RYUICHI
分类号 G06F13/12;G06F13/18;G06F13/28;G06F13/362;G06F13/40;(IPC1-7):G06F13/28 主分类号 G06F13/12
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