发明名称 MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain constitution of a common data bus in which write-in operation speed after read-out operation is increased and speed of read-out operation itself is increased. SOLUTION: In a memory device having plural segments SGM comprising plural memory cells MC, a common data bus provided commonly for plural segments is arranged being divided into a common data bus rcdb#z being exclusive for read-out and a common data bus wedb#z being exclusive for write-in. By making such constitution, even if read-out data exists on a read-out common data bus by read-out operation, write-in data can be supplied to a write-in common data bus, and even if an operation frequency is made higher, timing of write-in operation after read-out is not restricted, speed of write-in operation after read-out can be increased.
申请公布号 JP2000315388(A) 申请公布日期 2000.11.14
申请号 JP19990124284 申请日期 1999.04.30
申请人 FUJITSU LTD 发明人 KIKUTAKE AKIRA;MATSUMIYA MASATO;ETO SATOSHI;KAWABATA KUNINORI
分类号 G11C11/409;G11C7/10;G11C11/401;G11C11/407;(IPC1-7):G11C11/409 主分类号 G11C11/409
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