| 摘要 |
A dynamic set/reset circuit is provided with a first feedback line and a second feedback line. The first feedback line provides an interlocked feedback signal which permits high frequency operation of the set/reset circuit. The second feedback line prevents the interlocked feedback signal from causing the circuit to improperly change state until the next cycle of the circuit. In this manner, the circuit will operate properly despite an unexpectedly wide pulse on an input line. The dual feedback can be used on the set or reset inputs of a set/reset circuit, or both, and the set/reset circuit can be used in various logic and high speed applications, such as within a microprocessor.
|
