发明名称 Method for manufacturing interconnecting plug
摘要 A method for forming interconnection plugs comprising the steps of providing a substrate having a dielectric layer formed thereon, wherein an opening exposing a pad area for connection with other structures is also formed in the dielectric layer. Next, a glue layer is formed over the pad area and the dielectric sidewalls of the opening. Subsequently, plug material is deposited into the opening forming a plug layer. This is followed by etching back the plug layer to return the plug material inside the opening to a level below the height of the dielectric layer. Then, a selective etching method having a high selectivity ratio between the dielectric layer and the plug layer is used to etch the dielectric layer. Finally, the dielectric layer and the plug layer are etched to almost the same level of height. The characteristic of this invention is the utilization of the higher etching r!ate of dielectric material with respect to the plug material so that the dielectric layer is etched back to the same level of height as the plug layer. Hence, the formation of recesses on the plug surface and the surface of subsequently deposited metallic layer is avoided.
申请公布号 US6146995(A) 申请公布日期 2000.11.14
申请号 US19970985698 申请日期 1997.12.05
申请人 WORLDWIDE SEMICONDUCTOR MANUFACTURING CORP. 发明人 HO, CHING-YUAN
分类号 H01L21/768;(IPC1-7):H01L21/476;H01L21/302 主分类号 H01L21/768
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