| 摘要 |
PROBLEM TO BE SOLVED: To prevent such a situation that the oscillation frequency of a voltage control oscillator becomes impossible to correct at the time of rising of a power supply or the release of a power saving mode in the pixel clock generating circuit of an image forming apparatus. SOLUTION: An output control circuit 26 stopping the output of the signal from a first frequency divider 22 or increasing the frequency dividing ratio of the first frequency divider 22 is provided as a correction operation ensuring means for setting the voltage inputted to a voltage control oscillator 24 to predetermined voltage or less to perform protection so that the oscillation frequency of the voltage control oscillator 24 does not exceed the operation frequency of ASIC in an initialized state at the time of power supply-ON or at the time of release of a power saving mode. As a result, the feedback control in an image clock generating circuit 12 can be performed without a problem and the correction operation using the circuit can be certainly realized.
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