发明名称 TRAY FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To make it possible to reliably support a semiconductor device without depending upon the width and narrowness of the outer peripheral part of the lower surface of the package of the device, and without contacting terminals for wiring with the wall surfaces of a housing part and the like in the case where the device, such as a BGA(Ball Grid Array), is housed in the housing part. SOLUTION: This tray 10 has first wall surfaces 18, which are arranged on the periphery of a semiconductor device 5 in the case where the device 5 is housed in a first housing part 14 for housing the device 5 such as a BGA, and the edge parts of a package of the device 5 are supported by the wall surfaces 18. The tray 10 has first wall surface parts 24, which are slanted at such a slanted angle as to avoid the contact of the wall surface parts 24 with terminals for wiring. In such a constitution, the slanted first wall surface parts 24 come into contact with the edge parts only of the package and this package can be supported by the parts 24.</p>
申请公布号 JP2000315723(A) 申请公布日期 2000.11.14
申请号 JP19990124326 申请日期 1999.04.30
申请人 NEC CORP;SUMITOMO CHEM CO LTD 发明人 SENBONMATSU SHIGERU;ISHIKAWA MANABU
分类号 H01L21/50;H01L21/00;H01L21/673;H01L21/68;H01L23/00;(IPC1-7):H01L21/68 主分类号 H01L21/50
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