发明名称 |
Internal clock generator |
摘要 |
An internal clock generator including a switching controller interposed between a digital delay locked loop and an externally generated clock signal. The switching controller reduces current consumptions starting from a next cycle when an external clock and an internal clock are in phase. Further, when the external clock and the internal clock are in phase, driving of the unnecessary elements is suppressed, thereby reducing the current consumption in the internal clock generator.
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申请公布号 |
US6147527(A) |
申请公布日期 |
2000.11.14 |
申请号 |
US19980136871 |
申请日期 |
1998.08.19 |
申请人 |
SAMSUNG ELECTRONICS, CO., LTD. |
发明人 |
LEE, JUNG-BAE;LEE, SUNG-GEUN;HAN, JING-MAN |
分类号 |
G11C11/407;G06F1/04;G06F1/10;G11C7/22;G11C11/34;H03K5/13;H03L7/00;H03L7/08;H03L7/081;H03L7/087;H04L7/033;(IPC1-7):H03K5/14 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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