发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a semiconductor circuit device of which manufacturing is simple and in which relieving defect can be performed under high reliability. SOLUTION: This device has first and second memory matrix including plural memory cells respectively, a relief address holding circuit including plural elements for storing a relief address for changing so that a memory cell of the second memory matrix is selected instead of a memory cell of the first memory matrix, a decoder selecting a memory cell from the first memory matrix when an address signal does not coincides with the relief address and selecting a memory cell from the second memory matrix when the address signal coincides with the relief address, and a pad applying voltage required for storing the relief address in the element. And it is prevented that a potential level of the pad is made unstable.</p> |
申请公布号 |
JP2000315394(A) |
申请公布日期 |
2000.11.14 |
申请号 |
JP20000102943 |
申请日期 |
2000.04.05 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
KURODA KENICHI;TAKEDA TOSHIFUMI;MORIUCHI HISAHIRO;SHIRAI MASAKI;SAKAGUCHI JIRO;MATSUO AKINORI;YOSHIDA SEIJI |
分类号 |
G11C11/401;G11C16/06;G11C29/00;G11C29/04;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C29/00;H01L21/824 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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