| 摘要 |
<p>An integrated circuit substrate (22) is provided with a transistor gate member (36) that has opposing sidewalls. A first spacer (32) extends from one of the sidewalls and a second spacer (34) extends from another of the sidewalls. Source/drain regions of the substrate (22) are doped, with the first and second spacers (32, 34) correspondingly masking first and second regions of the substrate (22). The first and second spacers (32, 34) are removed after doping and the first and second regions are exposed. The exposed first and second regions are then doped. The substrate (22) is heated after this second doping stage to activate dopants. A third spacer is formed on the first region and a fourth spacer is then formed on the second region. A silicide contact is established.</p> |
