Semiconductor memory device

摘要

A semiconductor memory device operating in synchronism with a clock includes an address latch&comparator part latching a first address signal associated with a write command and comparing the first address signal with a second address signal associated with a read command. A write data buffer part holds a data signal associated with the write command. The data signal held in the write data buffer part is read as a data signal requested by the read command when the first and second address signals coincide with each other.