发明名称 Protection of the logic well of a component including an integrated MOS power transistor
摘要 The present invention relates to a structure for ground connection on a component including a vertical MOS power transistor and logic components, the substrate of a first type of conductivity of the component corresponding to the drain of the MOS transistor and the logic components being formed in at least one well of the second type of conductivity and on the upper surface side of the substrate. In the logic well, a region of the first type of conductivity is formed, on which is formed a metallization, to implement, on the one hand, an ohmic contact, and on the other hand, a rectifying contact.
申请公布号 US6144066(A) 申请公布日期 2000.11.07
申请号 US19980094341 申请日期 1998.06.09
申请人 SGS-THOMSON MICROELECTRONICS S.A. 发明人 CLAVERIE, ISABELLE
分类号 H01L29/872;H01L21/822;H01L21/8234;H01L27/02;H01L27/04;H01L27/088;H01L29/47;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L29/872
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