发明名称 MEMORY INTERFACE AND DATA PROCESSING DEVICE
摘要 PROBLEM TO BE SOLVED: To enable transferring data efficiently in a SDRAM(synchronous dynamic random access memory) by performing appropriately refresh processing of SDRAM. SOLUTION: A SDRAM 1 is accessed from blocks 3, 4 through a mediation block 2. The mediation block 2 informs proper or improper of access to the blocks 3, 4 depending on a high/low state of a busy signal based on access request from the blocks 3, 4. When access request is not performed for the prescribed period, a request signal is outputted to a refresh pulse generating circuit 5. Receiving a request signal, the circuit 5 generates a refresh pulse. In the mediation block 2, a refresh command of the SDRAM 1 is issued based on a refresh pulse and refresh processing of the SDRAM 1 is performed. As refresh processing is performed while selecting a time in which the SDRAM 1 is not accessed, a bus of the SDRAM 1 can be efficiently utilized.
申请公布号 JP2000311484(A) 申请公布日期 2000.11.07
申请号 JP19990120100 申请日期 1999.04.27
申请人 SONY CORP 发明人 MIYAZAWA TOMOJI;TAKAGI SATOSHI
分类号 G11C11/406;G06F12/00;G11B20/10;G11C11/401;G11C11/407 主分类号 G11C11/406
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